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3918-pixel ccd linear image sensor (b/w) description the ILX514 is a reduction type ccd linear sensor developed for high resolution facsimiles and copiers. this sensor reads a4-size documents at a density of 400 dpi (dot per inch). a built-in timing generator and clock-drivers ensure direct drive at 5v logic for easy use. in addition, reset pulse can be switched between internal generation and external input. features number of effective pixels: 3918 pixels pixel size: 7m 7m (7m pitch) built-in timing generator and clock-drivers ultra low lag/ultra high sensitivity/low dark output single output method maximum clock frequency: 5mhz absolute maximum ratings supply voltage v dd1 11 v v dd2 6v operating temperature ?0 to +60 ? storage temperature ?0 to +80 ? pin configuration (top view) ?1 e93302c78-ps sony reserves the right to change products and specifications without prior notice. this information does not convey any license by any implication or otherwise under any patents or other right. application circuits shown, if any, are typical examples illustrating the operation of the devices. sony cannot assume responsibility for any problems arising out of the use of these circuits. ILX514 22 pin dip (cer-dip) 1 nc 2 gnd 3 gnd 4 rssw 5 f clk 6 v dd1 7 nc 8 nc 9 10 nc 11 f rog 12 nc 22 21 20 19 18 17 16 15 14 13 nc v dd1 rs/sh gnd gnd v dd1 gnd nc 1 3918 v out v dd2 v dd1
?2 ILX514 block diagram aa aa a a v out gnd gnd rs/sh f clk v dd1 v dd2 nc nc nc v dd1 rssw nc gnd gnd v dd1 gnd nc 2 3 4 5 7 8 9 10 11 12 13 14 15 16 17 20 22 read out gate ccd analog shift register clock-drivers clock pulse generator sample-and-hold pulse generator mode selector read out gate pulse generator ?output amplifier ?sample-and-hold circuit ?feed through suppression circuit . d116 d99 s3918 s3917 s2 s1 d98 d18 d17 18 19 21 ccd analog shift register read out gate clock-drivers 6 f rog 1 nc nc v dd1
?3 ILX514 pin description pin no. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 symbol nc gnd v dd1 v out gnd f rog nc v dd2 rssw * 1 nc nc nc nc gnd gnd nc gnd v dd1 v dd1 rs/sh * 1 v dd1 f clk description nc gnd 9v power supply signal output gnd clock pulse nc 5v power supply reset pulse swithover pin nc nc nc nc gnd gnd nc gnd 9v power supply 9v power supply clock pulse or with s/h; without s/h switch 9v power supply clock pulse * 1 output mode is changeable as follows. gnd v dd1 gnd internal rs without s/h v dd1 internal rs with s/h f rs external rs without s/h 9pin 20pin
?4 ILX514 item v dd1 v dd2 min. 8.5 4.75 typ. 9.0 5.0 max. 9.5 5.25 unit v v recommended voltage note) rules for raising and lowering power supply voltage to raise power supply voltage, first raise v dd1 (9v) and then v dd2 (5v). to lower voltage, first lower v dd2 (5v) and then v dd1 (9v). item input capacity of f clk pin input capacity of f rog pin input capacity of rs/sh pin frequency of f clk frequency of f rs min. typ. 10 10 10 1 1 max. 5 5 unit pf pf pf mhz mhz symbol c f clk c f rog c rs/sh f f clk f f rs clock characteristics
?5 ILX514 item sensitivity 1 sensitivity 2 sensitivity nonuniformity saturation output voltage saturation exposure even and odd black level dc difference dark voltage average dark signal nonuniformity image lag 9v supply current 5v supply current total transfer efficiency output impedance offset level dynamic range min. 7.5 1.0 0.072 92 500 typ. 10.8 24.6 4 1.5 0.139 1.0 0.3 0.6 0.02 16 2.1 98 600 3.0 5000 max. 13.9 10 10 2 3 32 5.0 unit v/(lx ?s) v/(lx ?s) % v lx ?s mv mv mv % ma ma % v remarks note 2 note 3 note 4 note 5 note 6 note 7 note 8 note 9 note 10 note 11 note 12 symbol r1 r2 prnu v sat se ? v v drk dsnu il i vdd1 i vdd2 tte z o v os dr electro-optical characteristics (note 1) (ta = 25?, v dd1 = 9v, v dd2 = 5v, f clk = 1mhz, internal f rs mode without s/h, light source = 3200k, ir cut filter, cm-500s (t = 1.0mm)) notes) 1) in accordance with the given electrooptical characteristics, the even black level is defined as the mean value of d8, d10, d12 and d14. the odd black level is defined as the mean value of d7 , d9, d11 and d13. 2) for the sensitivity test light is applied with a uniform intensity of illumination. 3) w lamp (2854k) 4) prnu is defined as indicated below. ray incidence conditions are the same as for note 2. prnu = 100 [%] where the 3918 pixels are divided into blocks of 98, even and odd pixels, respectively (even and odd last blocks are 97). the maximum output of each block is set to v max , the minimum output to v min and the average output to v ave . 5) use below the minimum value of the saturation output voltage. 6) saturation exposure is defined as follows. se = 7) indicates the dc difference in value between odd black level and even black level. 8) optical signal accumulated time t int stands at 10ms. (v max ?v min )/2 v ave v sat r1
?6 ILX514 9) the difference between the maximum and mean values of the dark output voltage is calculated for even and odd respectively. the larger value is defined as the dark signal nonuniformity. optical signal accumulated time t int stands at 10ms. 10) v out = 500mv (typ.) 11) vos is defined as indicated below. 12) dynamic range is defined as follows. dr = when optical accumulated time is shorter, the dynamic range gets wider because dark voltage is in proportion to optical accumulated time. v sat v drk vout gnd v os
?7 ILX514 application circuit * when noise influence into output signal is large, connect pins indicated by (a) to the analog power supply and pins indicated by (d) to the digital power supply, and also use a decoupling capacitor of large capacitance. 1 2 3 4 5 6 7 8 9 10 11 12 22 21 20 19 18 17 16 15 14 13 (a) gnd f clk (a) v out (d) v dd2 f rog nc nc rs/sh (d) gnd (d) 9v 5v f rog 10/10v 0.01 output signal 1k w 10/16v 0.01 2sa1175 v dd1 (d) v dd1 (a) v dd1 (a) gnd (d) gnd nc nc (a) gnd nc (d) rssw nc (a) v dd1 nc f rs f clk application circuits shown are typical examples illustrating the operation of the devices. sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same. * this application circuit shows when f rs is used externally. ( )
?8 ILX514 clock timing diagram * a a a aa aa a a aa aa a a a a a a a a a a a f rog f clk vout 5 0 5 0 1 2 3 4 4034 1 2 d2 d1 d3 d4 d5 d6 d16 d17 d18 d19 d20 d96 d97 d98 s1 s2 s3 s4 s3915 s3916 s3917 s3918 d99 d100 d106 d107 d108 d109 1-line output period (4034 pixels) dummy signal (98 pixels) effective picture elements signal (3918 pixels) dummy signal (18 pixels) optical black (80 pixels) f rs 5 0 d116 * this clock timing diagram shows when f rs is used externally.
?9 ILX514 clock pulse waveform conditions f clk, f rog pulse related internal f rs mode external f rs mode t8 f clk t9 t2 t1 t3 f rog aaa aaa aaaa aaaa t8 t9 t4 t5 t10 t10 t11 f clk vout t4 t5 f clk t8 t9 t7 t6 f rs aaa aaa aaaa aaaa t10 t12 t13
?10 ILX514 * 1 recommended condition during f clk = 1mhz. unit ns ns ns ns ns ns ns ns v v ns ns ns ns item f rog, f clk pulse timing f rog, f clk pulse timing f rog pulse high level period f clk pulse high level period f clk pulse low level period f rs pulse low level period f clk, f rs pulse timing input clock pulse rise/fall time input clock pulse voltage signal output delay time high level low level internal f rs external f rs max. t1 + t2 10 5.5 0.5 typ. 200 1000 1000 500 * 1 500 * 1 100 * 1 550 * 1 5 5.0 110 65 40 75 min. 100 800 800 100 100 40 100 4.5 0 symbol t1 t3 t2 t4 t5 t6 t7 t8, t9 v f clk , v f rog v f rs t10 t11 t12 t13
?11 ILX514 0 0.2 0.4 0.6 0.8 1.0 0 mtf mtf of main scanning direction (standard characteristics) normalized spatial frequency 0.2 0.4 0.6 0.8 1.0 0 spatial frequency [cycles/mm] 14.3 28.6 42.9 57.1 71.4 spectral sensitivity characteristics (standard characteristics) 400 500 600 700 800 900 1000 wavelength [nm] 0.2 0.4 0.6 0.8 1.0 0 relative sensitivity 1 0.5 1 0.1 output voltage rate integration time output voltage characteristics (standard characteristics) t int ?integration time [ms] 10 5 0 0.5 1 5 10 0.1 output voltage rate dark signal output temperature characteristics (standard characteristics) ta ?ambient temperature [?] 10 20 30 40 60 50 example of representative characteristics (v dd1 = 9v, v dd2 = 5v, ta = 25?)
?12 ILX514 0 5 10 15 0 iv dd1 ?v dd1 supply current [ma] operational frequency characteristics of the v dd1 supply current (standard characteristics) f f clk ? f clk clock frequency [mhz] 123 5 4 0 10 0 iv dd2 ?v dd2 supply current [ma] operational frequency characteristics of the v dd2 supply current (standard characteristics) f f clk ? f clk clock frequency [mhz] 123 5 4 20 1 2 3 0 vos ?offset level [v] offset level vs. v dd2 characteristics (standard characteristics) v dd2 [v] 4.75 5 5.25 5 4 6 ta = 25? ?.14 d vos d v dd2 1 2 3 0 vos ?offset level [v] offset level vs. v dd1 characteristics (standard characteristics) v dd1 [v] 8.5 9 9.5 5 4 6 ta = 25? 0.35 d vos d v dd1 1 2 3 0 vos ?offset level [v] offset level vs. temperature characteristics (standard characteristics) ta ?ambient temperature [?] 20 40 60 5 4 6 d vos d ta 03050 10 ?.8mv/?
?13 ILX514 notes on handling 1) static charge prevention ccd image sensors are easily damaged by static discharge. before handling be sure to take the following protective measures. a) either handle bare handed or use non chargeable gloves, clothes or material. also use conductive shoes. b) when handling directly use an earth band. c) install a conductive mat on the floor or working table to prevent the generation of static electricity. d) ionized air is recommended for discharge when handling ccd image sensor. e) for the shipment of mounted substrates, use boxes treated for prevention of static charges. 2) regulation for raising and lowering the power supply voltage when raising the supply voltage, first raise v dd1 (9v) and then v dd2 (5v). similarly, lower v dd2 (5v) first and then v dd1 (9v). 3) notes on handling ccd cer-dip packages the following points should be observed when handling and installing cer-dip packages. a) remain within the following limits when applying a static load to the ceramic portion of the package: (1) compressive strength: 39n/surface (do not apply any load more than 0.7mm inside the outer perimeter of the glass portion.) (2) shearing strength: 29n/surface (3) tensile strength: 29n/surface (4) torsional strength: 0.9nm b) in addition, if a load is applied to the entire surface by a hard component, bending stress may be generated and the package may fracture, etc., depending on the flatness of the ceramic portion. therefore, for installation, either use an elastic load, such as a spring plate, or an adhesive. c) be aware that any of the following can cause the glass to crack: because the upper and lower ceramic layers are shielded by low-melting glass, (1) applying repetitive bending stress to the external leads. (2) applying heat to the external leads for an extended period of time with soldering iron. (3) rapid cooling or heating. (4) applying a load or impact to a limited portion of the low-melting glass with a small-tipped tool such as tweezers. (5) prying the upper or lower ceramic layers away at a support point of the low-melting glass. note that the preceding notes should also be observed when removing a component from a board after it has already been soldered. aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa 29n 29n 0.9nm (2) (3) (4) 39n low-melting glass (1) upper ceramic layer lower ceramic layer
?14 ILX514 4) soldering a) make sure the package temperature does not exceed 80?. b) solder dipping in a mounting furnace causes damage to the glass and other defects. use a grounded 30w soldering iron and solder each pin in less than 2 seconds. for repairs and remount, cool sufficiently. c) to dismount an image sensor, do not use a solder suction equipment. when using an electric desoldering tool, ground the controller. for the control system, use a zero cross type. 5) dust and dirt protection a) operate in clean environments. b) do not either touch glass plates by hand or have any object come in contact with glass surfaces. should dirt stick to a glass surface, blow it off with an air blower. (for dirt stuck through static electricity ionized air is recommended.) c) clean with a cotton bud and ethyl alcohol if the grease stained. be careful not to scratch the glass. d) keep in a case to protect from dust and dirt. to prevent dew condensation, preheat or precool when moving to a room with great temperature differences. 6) exposure to high temperatures or humidity will affect the characteristics. accordingly avoid storage or usage in such conditions. 7) ccd image sensors are precise optical equipment that should not be subject to mechanical shocks.
?15 ILX514 package outline unit: mm package structure v h 8.19 0.8 22 27.426 (7m 3918pixels) 41.6 0.5 1 11 12 no.1 pixel 40.2 5.0 0.5 4.0 0.5 2.54 0.51 3.65 4.45 0.5 0.25 0?to 9 10.16 10.0 0.5 9.0 f 0.3 1. the height from the bottom to the sensor surface is 2.45 0.3mm. 2. the thickness of the cover glass is 0.8mm, and the refractive index is 1.5. 22pin dip (400mil) (at stand off) m package material lead treatment lead material package weight cer-dip tin plating 42 alloy 5.2g

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